Floating-Point

IEEE 754-1985, 754-2008
IEEE single-precision standard (binary32) - 32 bits
IEEE double-precision standard (binary64) - 64 bits

single-recision (binary32) -
1 bit - sign (S)
8 bits - exponention (E)
23 bits - mantissa (M)

Number = (-1)^S×1.M×^E-127

Reference:

Tutorial: Floating-Point Binary
Floating point ALU using VHDL implemented on FPGA
Single-precision floating-point format (Wikipedia)
Double-precision floating-point format (Wikipedia)

Two's complement

For representing +ve and -ve numbers.

The most significant bit (leftmost) bit:
0 => 0 or positive
1 => negative

e.g. 01110000 => +ve
e.g. 11110000 => -ve

If the left most bit = 0,

01110000 = 2^6+2^5+2^4 = 64+32+16 = 112

If the left most bit = 1, invert every remaining bit and add 1.

11110000 => 0001111 + 1 => 0010000 => -16

Reference:

Two's complement (Wikipedia)