顯示具有 Verilog 標籤的文章。 顯示所有文章
顯示具有 Verilog 標籤的文章。 顯示所有文章

2018/03/29

Verilog Development Environment with Mac

To develop Verilog codes with a Mac, the following tools may be used:

Command line editor: Nano

Graphical UI Editor: TextWrangler (Available on App Store for Free)

Compiler: Icarus Verilog (Install with Homebrew with command: brew install icarus-verilog)

Waveform Viewer: GTKWave (Write $dumpfile command to output vcd file

References:

如何在Mac OS X上安裝Verilog環境 (Instructions to Icarus Verilog and GTKWave installation)
is there a good verilog editor for mac?

Verilog vs. VHDL (Study EECC)
Digital Logic Design - Truth Table and K-map (Study EECC)

2018/03/16

Digital Logic Design - Truth Table and K-map

To convert digital logic conditions in a truth table to a digital circuit, use the K-map.

truth table 真值表
Karnaugh map / K-map 卡諾圖
Boolean algebra / logic algebra 布林代數 / 邏輯代數

References

Karnaugh map (Wikipedia)
Truth table (Wikipedia)
Boolean algebra (Wikipedia)
HOW TO: Combinational logic: Truth Table → Karnaugh Map → Minimal Form → Gate Diagram (YouTube)

Verilog Development Environment with Mac (Study EECC)

2018/02/23

Verilog vs. VHDL

Verilog -
1984年推出、1995年成為標準IEEE 1364-1995、較廣泛使用、接近程式語言

VHDL (VHSIC Hardware Description Language) -
1983開始、1987年成為標準IEEE 1076-1995、使用較Verilog少、學習時間較Verilog長、仍有其優點

參考資料
Verilog (Wikipedia)
VHDL (Wikipedia)
SystemVerilog (Wikipedia)
Verilog HDL和VHDL的比較

Verilog Development Environment with Mac (Study EECC)